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Subject: Re: circuit design for a constant current measurement

Date: 11/28/02 at 6:48 PM
Posted by: Ray
E-mail: rrogers@plaidheron.com
Message Posted:

In Reply to: circuit design for a constant current measurement posted by adil on 11/28/02 at 6:12 PM:

Your in deep water here. Not quite dangerous, but be carefull.
Gaurd (not shield) everything in sight.
I don't know your load configuration. If you have control of the return and can float a little ways I would take the load return and run it into the input of one of the opamps from Analog Devices:

Then the feedback resistor will transform your current into a voltage. Remember that the current feedback will be V/R but "V" has a component from the offset voltage. When doing your error budjet don't forget that. Now you hopefully have a reasonable signal; say in the mv range. You can operate on that.
This leaves the source for the 10na current. I would use a FET; since in this configuration you don't need to worry about source errors you can use almost any one.
If you don't have control over the return path then you should drive through a very low gate leakage FET source and monitor the drain. There are problems here but, as I recall, some of the new rail-to-rail op amps from TI actually work and you can use this to measure the voltage drop across a sense resistor. If you can directly connect the sense amplifier to the FET gate you can avoid resistor matching required to reject the common-mode voltage.
Evaluate all of the possible leakage paths, including PCB layout and take measures to control them.
If you do guard, through a low leakage op-amp follower or some such, then you will have minor problems with positive feedback that should be resolved using standard feedback theory.

I hope I have understood your question correctly.

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