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Subject: About noise and gain

Date: 08/16/03 at 11:46 AM
Posted by: Jason
E-mail: jason_class[AT55]yahoo.com (replace [AT55] with @ to reply)
Message Posted:

Hi Russ and All Experts,

I read abnout output noise for a simple cmos circuit.
I could not understand some part. I need help from experts here.
Please see the following website for visual
http://www.geocities.com/jason_class/noise.gif

Part1
--------
It is said that the following is true
|Vno|/|Vn1| = |Vno|/|Vn2| =gm1Ro equation1

Noise from Q1 and Q2 is the same due to the fact that they are symmetry.
Look at Q2 and Q4, I learn that the gain is gm4Ro where Ro is the total output resistance(ro4+ro2).
ro2=output impedance at Q2
ro4=output impedance at Q4
Or the Ro for this example is only ro4? Which is correct and why?


From equation1, I do not know why we need to use gm1 but not gm4. Is there any reason? Please help.

Part2:
-------
One of the statement says that
'For Vn3, notice the curent through this voltage source must be zero because ONE SIDE is connected to the gate of Q3. Therefore, assuming all the sources are zero, the drain current is unaffected by Vn3. This implies that the gate voltage of Q3 is unaffected by Vn3. In small signal model, Vn3 =Vgs4. '

I do not understand why drain current is unaffected by Vn3? Any formula to prove? Why gate voltage of Q3 is unaffected by Vn3 as well?

Then it tells the following
|Vno|/|Vn3| =|Vno|/|Vn4|=gm3Ro equation2

Why is that output noise gain for Vn3 is same as Vn4? Q3 is diode connected but Q4 is not.
Is the Ro here still equal to ro2+ro4?

Part3:
-------
The book says that
'The noise gain from Vn5 to output can be found by noting that it modulates the bias current and the fact that due to the SYMMETRY in the circuit, the drain of Q2 will track that of Q1. As a result, the last gain factor is given by
|Vno|/|Vn5|=gm5/2gm3 equation3

I do not know how to obtain equation3 at all? Kindly help me to explain in details. Why the denominator is 2xgm3?
And what is the SYMMETRY in the above staement refer to? With symmetry, what can we assume form that circuit(eg drain of Q2 will track drain of Q1, what does is mean?)?

Kindly help me , please. I need your help to explain in more detail so I can grab the concept. I am really a beginer.

Thank you for you help.
I really appreaciate it.


regards and thanks
Jason



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