| Home | Terms of Use | Site Map | Contact Us |
IndustryCommunity.com > Electrical and Electronic Community > Analog Circuit Design Forum > Message
Main Menu

[ List Subjects ][ Main Page ]
[ View Followups ][ Post Followup ]

Subject: Re: Adding a DC bias to a differential clock signal

Date: 04/10/02 at 9:05 AM
Posted by: Mario Santos
E-mail: msantos@seacorp.com
Message Posted:

In Reply to: Adding a DC bias to a differential clock signal posted by Mario Santos on 04/08/02 at 1:08 PM:

Russ & David,
Thanks for your replies. Being a "Newbie" to the technical field and coming from more of software/digital background, these analog design requirements are novel to me, however, with assistance from the experienced on this forum, I'm sure I will be able to succeed. To shed a little more light on what I have to work with, as posted earlier, I need to offset the clock signal by ~ 1.65 Vdc, so that I can run the program that I wrote for the receiver.
I have available to me a separate voltage source (via 120VAC to 7.8Vdc DIN rail transformer) which can tap into. My question is can I use this as the 1:1 Transformer that Russ posted previously and then build a voltage divider similar to the one that David suggested to obtain the +1.65 VDc and then inject that onto the signal line?
Also, David mentioned that his scheme would suffice as long as I didn't need to transmit a High or Low Dc. There will be digital data (manchester encoded siganl) riding on the clock, will this new circuitry affect that in some way.

Follow Ups:

Post a Follow-up:


Message to Post:


1999-2001 Sunlit Technology Co., Ltd. All rights reserved.