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Subject: Re: hot swap cards

Date: 08/22/01 at 5:50 PM
Posted by: Rajendra Pokharna
E-mail: rpokharna@corvis.com
Message Posted:

In Reply to: hot swap cards posted by Wes on 08/18/00 at 7:01 AM:

Hot Swap Controller

There are really three aspects to a successful hot-swap design. Proper power / signal connection sequencing, inrush current control, and extraction voltage transient limiting.
The relative lengths of the power, ground, and signal pins dictate the pin connection sequence. The conductive guide pin is connected to chassis ground and will dissipate any charge that is built-up on the stiffener plate/front plate. Next the power ground pin connects. This pin may be either connected to chassis or digital ground depending on the power/ground/signal floor plan. Then the power connectors make contact that will begin the power up sequence. Finally the logic-level ground and signals contacts connect. Inrush current control circuitry will control the charging of the power module input capacitors upon board insertion into a live backplane. The charging current profile can be attained by controlling the gate of a FET in series with the 48V input. A series resistance, R13, senses the current. This is then fed back to the IC through a resistor divider (R11 and R12). The IC limits the current through the FET (Q1) such that the voltage at the SENSE pin is equal to the voltage at the IMA pin. The resistor/capacitor network (R7, R8, R10, C3, and C4) at the input to the IMA pin acts to provide a slow charging current profile. The IC has other features too such as limiting the maximum current through the FET and limiting the maximum power dissipated in the FET. Therefore, the IC can act as an automatically reset electronic circuit breaker that can prevent the board input fuse from blowing. Many of the ICs have a shutdown pin as well that can be used to control the IC or as an electronic circuit breaker trip feedback signal. When the board is first inserted (time t0), the input voltage may bounce slightly until the contacts have been fully seated. Once the input voltage has stabilized (time t1) the voltage on the IMA pin begins to rise due to the aforementioned resistor/capacitor network. The FET gate is controlled such that the current through the FET causes the voltage at the SENSE pin to be less than or equal to the voltage at the IMA pin. When the 48V bus is charged to the input voltage (time t2), the current drops off to zero until the power modules are enabled (time t3). If ever the input current would become more than the designed maximum current, the IC will actively limit the current such that the voltage at the SENSE pin is equal to that at the IMA pin (time t4 to t5). When the current returns to within designed levels, the IC will again resume normal operation.
The other issue with hot swapping has to do with the voltage upon extraction of the circuit board from a live backplane. A circuit card may be drawing significant current during its normal operation. If one where to pull the card out, the trace inductance from the power modules to the power connectors could cause the voltage between the 48V IN and RTN connectors to rise significantly. For this reason, transient suppressors are located near the connectors to absorb this energy.


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