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Subject: Re: oscillator

Date: 03/23/00 at 10:03 PM
Posted by: John Dunn - Consultant
E-mail: ambertec@ieee.org
Message Posted:

In Reply to: oscillator posted by desautez on 03/23/00 at 3:38 AM:

Hi, Alain:

I have the schematic you e-mailed to me and I do have some comments.

The circuit you have is a self biased 2N3819 JFET, Q1, operating as a Colpitts oscillator. Although it is not part of the schematic, the gate-to-source capacitance of Q1 is a key element of this circuit. Let's call that capacitance "C4".

The impedance/voltage step-up network for the Colpitts configuration is established by this unseen C4, the source to ground capacitor C2 (which together comprise the split-capacitance portion of the Colpitts network) and inductor L1. Capacitor C1 tied in parallel with L1 contributes to setting the oscillation frequency, but it is not necessarily dominant in establishing that frequency, which may help explain the temperature sensitivity problem. It is C1 working almost in parallel with C4 that dominates the setting of frequency. It is my guess that the value of C4 is affected by temperature and, if I am correct about that, would explain frequency variations as a function of temperature.

There are also quite a lot of possible 1/f noise contributors. The 2N3819 itself is not an especially quiet device. The reverse biased gate to source junction will carry some reverse leakage current which will be heavy in 1/f noise. Also, the two reverse biased 1N4148 diodes and the pin 1 input of the CMOS gate U1a will do the same thing. Worse yet, all of these contributors are delivering their noise currents to the gate of Q1 which is the highest impedance point in the circuit and hence the most vulnerable.

I might suggest changing from a Colpitts configuration to a Clapp configuration. Exact component choices will probably require some experimentation, but a first-pass try might go as follows. (I am attempting to minimize the number of suggested changes. These suggested circuit revisions are not really the full set of revisions that one might make here.)

In the original circuit, disconnect that end of C3 which is shown going to L1. Leave that disconnected end alone for now. We'll reconnect it a little later.

Remove C1 altogether, but hold onto that part because we'll need it again.

Connect a 1 Meg resistor from the gate of Q1 to ground.

Disconnect that end of L1 which is attached to ground and connect C1 between that disconnected end of L1 and ground (L1 and C1 are now in series from the gate of Q1 to ground.)

Replace C2 with a 1000 pF.

Connect a new 100 pF between the gate of Q1 and the source of Q1. Let's call that capacitor C5.

Connect the free end of C3 to the junction of Q1's drain and R2.

The Clapp circuit was developed as an extension of the Colpitts. It uses a split capacitor and coil arrangement to develop the impedance/voltage step up, but the capacitances used in the split capacitor pair are very much larger than the junction capacitances of Q1 and therefore tend to swamp out variations in the value of C4. The result is that the dominant frequency setting components are L1 and C1, working almost independently of C4.

Secondly, the gate of Q1 is now free of the noise currents from D1, D2 and U1. You might want to play with the 1 Meg, possibly lowering it to 100K or so. I'm not quite sure about the best way to provide a DC return for Q1's gate.

Good luck.

John Dunn - President
Ambertec, Inc.
ambertec@ieee.org


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