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Subject: Re: LOOKING FOR VLSI/ASIC JOB

Date: 02/12/03 at 1:10 AM
Posted by: jothi vanavan
E-mail: j_vanavan@yahoo.com
Message Posted:

In Reply to: LOOKING FOR VLSI/ASIC JOB posted by G.VISHAK KUMAR on 12/08/02 at 3:05 AM:

RESUME
T.JOTHI VANAVAN,B.E,
3,4TH CROSS ST,
L.B.NAGAR,
MAYILADUTURAI,
TAMIL NADU,
INDIA,
PIN:609001,
EMAIL:j_vanavan@yahoo.com
PHONE:91-4364-224783.
OBJECTIVE:
TO GET VLSI DESIGN JOB IS MY ULTIMATE AIM.
DURING MY COLLEGE TIME I INSPIRED LOT BY CONCEPT OF
SYSTEM SIMULATION,SO I ENTERED IN VLSI DESIGN.I CAN
DO GOOD ROLE IN FRONT END VLSI DESIGN(VHDL/VERILOG),
(HARDWARE ABSTACTION).I LIKE TO SPECIALISE ASIC/CMOS
(PHYSICAL DESIGN).

ACADAMIC QUALIFICATION:

S.S.L.C:69.2%
H.S.C :61.66%
(D.B.T.R.N.H.S.SCHOOL )
MAYILADUTURAI.
TECHNICAL QUALIFICATION:
B.E:
(A.V.C.COLLEGE OF ENGG)
MANAPANDAL,
MAYILADUTURAI.
PERCENTAGE:
1-YEAR:64%
ECE:58.40%
CLASS:2
SHORT TERM COURSE:
( CERTIFICATE COURSE IN VLSI DESIGN)
SASTRA
DEEMED UNIVERSITY
(TIFAC-CORE)
SPONSERED BY DEPARTMENT OF SCINCE&TECH,
INDIA.
CGPA:9.5/10
PROJECTS:

IN U.G:
HELP UTILITIES PROGRAM IN "C" LANGAUAGE
(MENU DRIVEN) HAVING UTILITIES OF OPERATING SYSTEM
AND UTILITIES.

IN SHORT TERM:

DESIGN OF 8-BIT RISC PROCESSER HAVING
INSTRUCTION SET(HALT,SKIP IF ZERO,ADD,AND,XOR
LOAD,STORE,JUMP) IN VHDL.

PERSONAL DETAILS
NAME: JOTHI VANAVAN.T

FATHERS NAME: THIAGARAJAN

SEX: MALE

NATIONALITY: INDIAN

DATE OF BIRTH: 18.06.78

LANGUAGE KNOWN: ENGLISH,TAMIL

FIELD OF INTREST:
ASIC DESIGN
CAD FOR VLSI



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