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Subject: VLSI and ASIC Designers

Date: 09/25/01 at 1:29 AM
Posted by: kishore kunal sinha
E-mail: ks_kunal007@indiatimes.com
Message Posted:

In Reply to: Re: VLSI and ASIC Designers posted by DEBI PRASAD DAS on 09/17/01 at 9:02 AM:

CURRICULAM VITAE

Kishore Kunal Sinha

Email : ks_kunal@rediffmail.com
ks_kunal007@indiatimes.com


OBJECTIVE:

Association with a "Professional ambience"
offering steady growth and recognition towards
my contribution for the positive Advancement
of the organization.I am willing to use my
skills and Knowledge to the best of my abilities.


EDUCATION

Jan-June 2001 Electronics Science Dept.,
Pune University Certificate Course in VLSI Design.

1996-2000 , Pune University.
Bachelor of Engineering (Electronics)
Passed in Nov. 2000 with Higher Second Class

1994-1995 HSC, Maharashtra Board
Passed in March 1995 with First Class

1992-1993 SSC, Maharashtra Board
Passed in March 1993 with First Class

VLSI COURSE DETAILS

vlsi design Hierarchy :
Standard Cells, Gate Array, PLDs, FPGA,
PLA, PAL & Empasis on ASIC using Standard Cell.

CMOS Process and Device Technology :
Review of Microelectronics,Basic MOS Transistor,
NMOS fabrication and CMOS fabrication.

Lay Out Design :
Floor Planning, FPGA, Place and Routing Compaction,
Verification, Circuit Extraction, Off Sheet
Connections.

Simulators : Logic, Timing and Circuit.

Design Capture Tools :
State Machine Based Design, Schematics Based
Design and VHDL Coding.

Design Verification Tools :
Timing Simulation, Logic Simulation.

Design Implementation Tools:
Logic Synthesis, Optimization, Place and Routing.


PROJECTS

VLSI Project - Digital Image Processing.

Under the Guidance of
Dr. Prof. D.C. Gharpure & Prof. Mrunal Puranik,
Electronics Science Department, Pune University.

SCOPE

The basic aim of the project is as follows :

Histogram Modification: It includes Grey Scale
Representation,Thresholding, Contrast Stretching.

Edge Detection and Median Filter :
To Detect Horizontal and Vertical Edges and Lines.


Image Compression :
To Approximate the Image Representation Suitably
to reduce Storage Space and Overheads on
Transmissions, Ensuring Sufficient Clarity.


B.E. Project
Micro Controller Based Fuel Injection System .


Under the Guidance of
Prof. R. P. Sood (HOD) & Prof. M.M. Patil,
Electronics Engineering, Department of
Electronics Engineering,
S.E.S. College of Engg.Kopargaon.

SCOPE

The basic aim of the project was to Study the
requirements of Fuel Injection System for
Efficient & Smooth running of the Engines and
avail the information like Fuel to Air Ratio,
Humidity & Atmospheric Pressure and Effects of
Speed on Fuel Injection using Microcontroller
based Signal Conditioners.The use of Microcontroller
made the project user friendly,cost effective and
expandable without any major modifications.


Industrial Training

Practical factory training at Pyrotech Electronics
Private Limited Udaipur (Rajasthan)


AWARDíS RECEIVED
1st Runnerís up in Inter College Athletics in
1994-95.
1st Runnerís up in Inter School Football
(Subrato Mukharjee Cup) in 1992-93 at District
Level

INTEREST AND ACTIVITIES

Reading Newspaper
Listening Music
Playing Cricket and Football

COMPUTER AWARENESS

Operating System DOS, Windows 95

Programming Languages C

Assembly Language 8085 & 8086

PC Hardware and Maintenance.


PERSONAL DETAILS

Date of Birth 8th May 1978

Sex Male

Marital Status Single

Languages Known English,Hindi,Marathi

Passport Number B2122728

PERMANENT ADDRESS
C/o. Lal Babu Yadav
Malsalami, Mainroad,
Patna City
Bihar - 800008
Ph.No.: +91 - 0612 - 617162 / 641914

ADDRESS FOR CORRESPONDENCE
C/o. Ashok kumar
1/42,
Lal Bahadur Sashtri Sanskrit Vidyapith,
Katwaria Saria,
New Delhi-110016.
Ph no- +91-11-6564173



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