Title: FPGA / ASIC Designer
Location: Richardson, Tx Telecom Corridor
Join Power Micro Research, a small (30 people) company specializing in high-speed networking products.
FPGA / ASIC design for next-generation network products. Duties include architecture definition, design capture using Verilog, synthesis optimization, test bench design, verification and static timing analysis.
BS/MSEE with 4+ years experience using Verilog HDL. Working knowledge with ASIC design flow and fundamentals for gate-array and standard-cell technologies. Xilinx FPGA design experience desirable. Experience in PCI, Gigabit Ethernet, C programming a plus.
Power Micro Research
1411 East Campbell Rd. Suite 1100
Richardson, Tx 75081
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