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Subject: Agilent 1015046 R&D Engineer, ASIC Verification (Post Silicon)

Date: 10/07/03 at 3:04 PM
Posted by: Sylvia Solorzano- Agilent Technologies
E-mail: sylvia_solorzano[AT55]agilent.com (replace [AT55] with @ to reply)
Message Posted:

More opportunities at Agilent! We are on fire!

1015046 R&D Engineer, ASIC Verification (Post Silicon)
Location: Roseville, Ca; Santa Clara, Ca

Our R&D lab is responsible for developing and marketing application specific integrated circuit (ASIC) solutions in the storage networking market. We have active development projects in our industry-leading Tachyon Fibre Channel controller IC business as well as in emerging storage networking IC businesses. We offer a challenging and dynamic working environment with opportunities to make a substantial contribution in exciting new product development. We work on cutting edge technology in a high energy, team oriented environment.


Our team is looking for Engineers with a background in the right mix of hardware, firmware and VLSI verification skills.

In this position, you will be involved in the requirements, architecture, design, and implementation of new tools that will creatively exercise and diagnose complex VLSI chips. You will be working closely with cross-functional teams to understand and develop verification tools that can provide timely engineering feedback. In addition, you will be active in program verification strategies, planning, and execution.

Minimum Qualifications
Bachelors degree in EE, CS, CE, or equivalent
Minimum 3 years experience
Strong C/C++ programming skills
Solid understanding of embedded systems fundamentals
Strong knowledge of hardware and computer architecture
Experience in VLSI verification
Experience debugging complex ASIC hardware
Experience with high speed bus interfaces (e.g. PCI)
Experience using logic analyzers to capture high speed bus traces (e.g. PCI, Fibre Channel)
Detailed knowledge of storage protocols (e.g. Fibre Channel, SCSI)
Post-silicon verification experience
Excellent communication skills
Ability to effectively work with cross-functional teams
Self-starter
Ability to quickly learn new technologies

Desired Qualifications
Masters degree or higher in EE, CS, or CE
Experience using or programming Tachyon Family of Fibre Channel Protocol ICs
Proven leadership skills
Experience leading engineering design architectures
Experience defining program verification strategies
PCB design experience
ASIC design experience
Pre-silicon verification experience
Functional, system, and solution test experience
Experience in / Knowledge of storage networking
Development experience with VxWorks
Development experience implementing multiple new technologies
Experience in test planning, test case design, and test automation.
Experience working with customers and external vendors
Outsourcing experience
Proven technical leadership skills
Experience leading cross-functional teams
Good presentation and speaking skills



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