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Subject: Re: Looking for VLSI/ASIC Job

Date: 10/07/03 at 1:48 AM
Posted by: bharati abhang
E-mail: bharati_abhang@hotmail.com
Message Posted:

In Reply to: Looking for VLSI/ASIC Job posted by M.Marimuthu Kumar on 11/22/02 at 2:31 AM:

Bharati C. Abhang.Bhusari Colony, Puja Apartment,Plot No 50, Flat No 5, S.No.95, Behind Shubharambh KaryalayaKothrud, Pune 411 038.Phone No - 5286582

To,
Eton Industries Pvt ltd


Sub. : - Application for the post of ' PCB/ Electrical Desin Engg.
* * *
Respected Sir,

I, Bharati C. Abhang Presently pursuing Part time DEGREE (B.E), Electronics & Tele communication in Cusrow Wadia Inst of Engg having 3.5 years of working experiance.I have done Diploma in Electrical Engineer from Government Polytechnic, Pune in year 1999 & also completed Diploma in V.L.S.I. from Bitmapper Integration Technologies Pvt. Ltd. (ISO – 9001). I have keen interest in above-mentioned post. I feel your job offers me a greater scope for my abilities.
My experience and knowledge give me the confidence to apply for the same. I assure you my hard work & best services always. My Bio-Data is attached along with the letter for your reference.

Looking forward to hearing from you.

Thanking you,
Yours sincerely,


(Bharati C. Abhang)
Encl.: Resume

Summary: - 3 years of work experience in Automation design ,microp/microc field from French company. Presently doing Part time DEGREE (B.E), Electronics & Tele communication in Cusrow Wadia Inst.& completed Diploma in V.L.S.I. with work experianece on live project for 7 months from Bitmapper Integration Technologies Pvt. Ltd. (ISO – 9001).
R E S U M E
Personal Information

Address : Bhusari Colony , Puja Apartment,Plot No 50, Flat No 5,S.No.95, KothrudPune 411 038.

Marital status : Single

Nationality : INDIAN.

Date of Birth 8th December 1979
:
Pass Port No. :

Phone : Res : 5286582

Email : abhangbharati@yahoo.combharati_abhang@hotmail.com

Professional Qualification

Company Designation Period Nature of Job
ATEQ System Analytic India Pvt. Ltd.[ French Company] Special PurposeMachineEngineer Jan.2000to Feb. 2003 Design,(Electronics / Electrical)Manufacturing
Bitmapper Integration Technologies Pvt. Ltd. (ISO – 9001). Trinee Design Engineer Dec.2002to Oct. 2003 Trainee VLSI engg.VLSI Trainer kit PCB Designer

Educational Qualification
A Final Statement of Marks for award of Diploma: 75.42%

Exam Name of Inst. Year % Grade
DEGREE In Electronics & Tele-communication Cusrow Wadia Inst of Engg II nd Appear (Part time)
Diploma in VLSI DESIGN BitmapperIntegration TechnologiesPvt.Ltd. 2003 A Certificate
Diploma in Electrical Engineering
3rd Year Govt. Polytechnic, Pune. 98-99 77% Distinction

Computer Skills and Training
§ Orcad / Pads awaring PCB designing tool.

§ Software Languages - C, C++.
§ Operating Systems - MS DOS, Windows 9X, UNIX.
§ AUTOCAD 14/2000.
§ PLC PROGRAMMING
§ Knowledge of QS-9000 Documentation, Calibration Standards.
§ Knowledge of embedded systems.
§ Training Course on "Calibration for ISO 9000:2000"
Seminar Attended on “Industrial electrical Safety” From MESAFE. In 1999

Dec 2002 onwards- working for Diploma in VLSI Design

Institution : Bitmapper Integration Technologies Pvt. Ltd. Pune

Courses Studied : Synthesis Simulation, Static Timing Analysis, Programmable Logic Devices, VHDL, Verilog, CMOS VLSI …etc.

Languages : VHDL, Verilog

Tools : Xilinx ISE series, ModelSim, Synplify

Projects undertaken Binary Rate Multiplier. [ BRM]Designed and Implemented a BRM to generate frequencies from1Hz to 20Khz using a 4Mhz input with a resolution of 1-Hz

IP for 8255Developed an IP for a general purpose Parallel Peripheral Interface, similar to Intel’s 8255

UART Universal Asynchronous Receiver TransmitterDesigned a programmable UART to be implemented on a PCI add-on card fro PC to PC communication.Features – Multiple UART’s Can be implemented in parallel in a PCI add-on card to offer the user 2-8 Serial channels in a PC


Activities as SPM Engg : -
1. Calibration, Maintenance & Testing of Electronic Devices. 2. PLC Programming 3. Design of Machine Automation Part.


Project Handled 1. Mahindra & Mahindra: -Rear oil seal Leak Test Machine. 2. 2. Bajaj Auto ltd- Cylinder head Casting Porosity L.T. M.
Responsibility Machine automation Design & Manufacturing.- PCB DESIGN, Programming
Brief Description Of Project * Fully automatic Machine. For checking leakage from Rear oil seal part of tractor engine of AVL & NEF Model.* For checking porosity in Cylinder head Casting of Pulsar 180 cc Two Wheeler vehicle.

Project Handled 1. L & T John Deere: - Tractor Engine Assembly L.T.M2. Telco(Indica plant):- Turbo cylinder Head (Indigo) LTM.
Responsibility Machine automation Design & Manufacturing
Brief Description Of Project * Fully automatic & semiautomatic Machine. For checking leakage from the whole tractor engine assembly of AVL & NEF Model.* Air/Water leakage testing for turbo cylinder head of INDIGO car. Newly launched car from TELCO (INDIGO).

Achievements.
§ Established a working relationship with all leading Business groups in India, like BAJAJ, TELCO, Hindustan Motors, Mahindra & Mahindra, Ucal Fuel Systems, TVS motor, Maruti Udyog.
§ Knowledge of Latest developments in electronics field, French Working Standards.


Extra Curricular Activities:-
§ Participated in Bhartiyam held during 3rd National Games organized in Pune
§ Active Organizer of College Annual Function and Gathering

Bharati C.Abhang.



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