In Reply to: Looking for Job in VLSI / ASIC posted by Nitu Singh on 03/04/03 at 1:18 AM:
A) JOB OBJECTIVE :
To pursue a challenging career in the field of electronics and communication engineering, that
best utilizes my enthusiasm,technical skills and interests in VLSI Design and Embedded Systems.
B) WORK EXPERIENCE:
Organisation : ICS Ltd,Hyderabad.
Job profile : Design Engineer(R&D).
March 2002 : Till Date.
C) EDUCATIONAL QUALIFICATION :
1. Diploma in VLSI Design (Feb.-2002)
2. B. Tech.-Electronics and Communication (July - 2001)
Year wise GPA
IV - 8.03
III - 8.14
II - 6.98
I - 6.43
DGPA- 7.53 (On the Scale Of 10)
Division - First.
3. INTERMEDIATE (1995)
Division - First.
4. HIGHSCHOOL (1993)
Division - First.
D) AREA OF INTEREST :
1. CMOS VLSI Design.
2. Digital System Design.
3. Digital Signal Processing.
4. PCB Design
E) INDUSTRIAL TRAINING :
Organization : HAL
Place of work : Lucknow
Duration : June 5 to July 15 ,2000
Field of Work : Assembly & Test (Instruments)
Profile : Technical Trainee
F: HARDWARE SKILLS :
1. Hardware Description Languages : VHDL , Verlog HDL.
2. Assembly language : (8085,8086, DSP Processors(Analog Devices,TI).
3. Technology : ASIC,FPGA,CMOS VLSI Design.
4. Tools Known :
a) Simulator:Model Sim,Active-HDL Sim,VDSP++.
b) Synthesis Tool : Leonardo Spectrum, XILINX ISE4.1i.
c) Place and root tool: Xilinx Design manager.
d) Smash : Analog and Mixed signal simulator.
e) Magic & IRSIM : CAD Layout drawing Tool.
5. Packages: MATLAB 6.1, OrCAD.
G) SOFTWARE SKILLS :
Operating System : WINDOWS 95/98,NT,Linux.
Packages : MS Office
Programming Languages : C & C++
H: PROJECTS UNDERTAKEN :
1) R&D Project:
i) Interactive Voice Response System (IVRS):
The system is designed to get the calls from 4 users simultaneously and transmit
the information needed by every caller. The project includes line interface that takes
care of the data coming from the telephone lines and gives it to the other sub modules
of the system. For this an FPGA (XILINX) is programmed using the VHDL.Simulation
is done using the Mentor Graphics simulator Model Sim and for synthesis and place &
route XILINX ISE 4.1package is used.
For DTMF coding and decoding, engage tone, dial tone generation and detection and voice
file transmission DSP is used. DSP programming is done in Assembly language and
ADSP-2189M DSP is used for this application
ii) DSP based Modulation Generator:
This system is designed to generate different type of modulations based on the command
given by control processor. This block can internally generate the various types of modulating
signals like single tone,double tone, wobble tone,Syllabic rate generator; PNSequence,
Noise (white, pink). It can also take external voice signals from MIC, CD player or Tape
recorder via ADC.This module also does different type of modulation like (AM, AM-SC, SSB,
SSB-Reduced Carrier, FM). The digital FIRFilter is designed to filter the unwanted signals
and generate the SSB modulation, band-limited White noise and pink noise. All the programs are
written in assembly language on Analog Devices ADSP -2181 and ADSP -2189M DSP Processors.
A CPLD(Cypress) is also designed to generate the control signals for the various components like
ADC,DAC,DPRAM and others submodules to meet the required timing specification.The code for
the CPLD is written in VHDL using the cypress Active-HDL Sim.
2) VLSI Project:
Realization of Digital FIR Filter using Verilog HDL.:
It is a 23-order Low Pass FIR Filter using Buttorworth polynomial. For preparing each output sample,
it has to perform 23 floating-point multiplications and 22 floating point additions. Input data sample is
given by the sampling of waveform and converting all the 2500 decimal sample values into IEEE 754
standard of Floating point numbers using C- language.Input data samples and Coefficients are stored
in Dual Port RAM, which is working as FIFO. This memory has two independent ports one port provide
both reading & writing in RAM where as other port provide reading operation only. Floating Point Multiplier
will get its input samples from data & coefficient Memory. The product of Floating Point Multiplier will act
as an input to the adder which keeps on adding till all the 23 samples are processed and finally generate
the output sample.The important feature of this project is that only one adder and multiplier are used for all
the floating-point operations.
3) B.Tech (Electronics & Communication):
i) Final Year Project : LASER based wireless communication system.
The aim of the project was to provide a secure and reliable communication between the two media.
In this project information source provides an electrical signal to a transmitter comprising of an
electrical stage, which drives an optical source to give modulation of the light wave carrier. The optical
source (LASER) provides the Electrical-Optical conversion. The transmission medium is free space and
the receiver consists of an optical detector (Avalanche Photo Diode), which drives further
electrical stage and provides demodulation of optical carrier.
ii) Minor Project : Auto Changeover Switch From Genset to Main Supply.
iii) Seminar Topic : Non Geo Synchronous SatelliteSystem.
I) PERSONAL PROFILE :
NAME : HIMANSHU DWIVEDI
DATE OF BIRTH : 27th Sep' 1977
FATHER'S NAME : Mr. D. P. Dwivedi
NATIONALITY : Indian
i)CURRENT : Room no. 104,Stay Safe Hostel,
H-54, Madura Nagar, Ameerpet,
ii)PERMANENT : C-2175/7 ,Indira Nagar
Lucknow - 226016.(U.P.)
iii)E-mail ID. : firstname.lastname@example.org
Dr. S.N. Babu
Director, C-DAC ACTS, Hyderabad.
Ph.No. : (040)- 23401331,23401332.
K) DECLARATION :
I here by declare that all the information furnished above are true to the best of my knowledge.
Place: HYDERABAD (Himanshu Dwivedi)