In Reply to: Looking for job in VLSI/ASIC design posted by Rishi Sehgal on 10/29/02 at 3:27 AM:
VLSI / III / 47, ER&DCI
C-56/1, SECTOR-62, NOIDA (U.P)
Ph. (0120) 24584102, 24580523.
E-mail : firstname.lastname@example.org
To work efficiently in the field of VLSI Design and work towards a good foundation and career in this industry.
B.E. (Electronics & Communication) with 80% marks from Agra University.
6-months full time training in VLSI Design from Electronic Research & Development Centre of India (Ministry of Communication & Information Technology Govt. of India) Noida (U.P.).
1: -Project Name : Parabolic Reflector with Receiver.
Duration : 15 Days.
Team Members : Five.
Brie : We had made parabolic reflector and receiver for catch the Sahara Channel.
2: -Project Name : Design & Development of SRAM.
Duration : 10 Days
Team Members : Two
Tools : Virtuoso (Layout Editor)
: Dracula (DRC)
: Spectra (Schematic Simulation Tool)
: SPICE (Simulation Tool)
Role : SPICE Modeling, Schematic Diagram
Brief : We had made schematic circuit (1024 *8 bit) and applied DRC. We
also create layout with the help of Virtuoso.
3: -Project Name : VHDL Coding of FIR Filter(DSP).
Duration : 10 days
Team Member : Two
Tools : LDV 3.2 (VHDL Coding)
Role : Write the VHDL code.
1-month training on CCTV of Electronics Department in AAI (Airport Authority of India)
I.G.I. Airport New Delhi.
HDL Language : Verilog.
Programming Language: C,C++.
:LDV 3.2 (NCVHDL, NCVERILOG SIMULATOR).
:Ambit Build Gates (Logic Synthesis).
:Virtuoso Layout Editor.
:Spectra (Simulation Tool).
:Silicon Ensemble (P&R).
:Xilinix Spartan II Series (FPGA).
Sun Solaris, UNIX.
Accept the challenge in odd situations. Keen to work with target based Industry. Strong analytical and interpersonal skill. Hard worker and a team player. Best negotiation skill. Willing to fulfill the commitment.
Father’s Name : Mr. Ram Prakash Gupta.
Date of Birth : 16th Nov. 1978.
Nationality : Indian.
Languages Known : Hindi, English.