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Subject: Re: Hardware VLSI/ Memory Design/ ASIC Engineer in BAY AREA Full Time/ Contract position

Date: 10/07/02 at 4:32 AM
Posted by: VISHAK KUMAR.G
E-mail: vishak_1@rediffmail.com
Message Posted:

In Reply to: Hardware VLSI/ Memory Design/ ASIC Engineer in BAY AREA Full Time/ Contract position posted by Chintan Purohit on 09/26/02 at 6:21 PM:

To,
The HRD Manager,

Sub: Application for any suitable post in the field of VLSI
Design/Project Trainee.

Respected Sir/Madam

I undersigned VISHAK KUMAR is B.E (MADURAI KAMARAJ UNIVERSITY)
with specialization "Electronic Communication".

I have completed Diploma in VLSI(C_DAC, Pune)

I hereby sending my resume for the kind consideration
against any suitable position in your esteemed organization.

Requesting yourself for the kind consideration.
Hoping for the favorable reply.

Thanking you in anticipation.
G.VISHAK KUMAR
HOUSE NO:283,
BTM 2ND STAGE,EWS LAYOUT,
NERA M.E.S COLLEGE
BNAGALORE-560076

>CURRICULUM VITAE
>
>
>Name : G.Vishak Kumar B.E. (E.C.E).,
>Date of Birth : 25th March 1980
>Sex : Male
>Category : General
>Father’s Name : V.Gajananan
>Fathers Designation : Selection Grade Lecturer in Physics,
> Govt.Arts College.
>Address for Communication : 18/45, Perumal Koil Street
> Sivaganga - 630 561
> Tamilnadu.
>Phone Number : (04575) 40132
>Email ID : vishak_1@rediffmail.com
>
>Educational Qualification
>1.Degree & Branch of Study : Bachelor of Engineering in
> Electronics and Communication
>Name of the Institution : Sethu Institute of Technology
>Name of the University : Madurai Kamaraj University.
>Period of Study : 1997 - 2001.
>Year of Passing : May 2001.
>
>2.Course - Diploma in VLSI Design (C-DAC, Pune)
>
>Institute : Thakur Institute of Carrier
> Advancement, Mumbai
>
>Major : Advanced Digital Design, Synthesis
> and simulation, Designing with
> HDL (VHDL/verilog),Xilinx FPGA.
>
>Project : Design of Ethernet switch
>
>Period : March 2002 – August 2002
>
>
>
>Academic Record :
>
>Exam passed Institute Year of Passing % of Marks
>
>10th Standrad Oxford Matriculation
> Higher Secondary April ‘95 75.636
> School
>
>
>12th Standrad Oxford Matriculation
> Higher Secondary School April ‘97 81.25
>
>
>Bachelor of Sethu Institute of
>Engineering technology May 2001 74.56
>inElectronics
>and
>Communication
>
>
>Percentage of Marks obtained in Semester wise
>B.E Period Year of Passing % of Marks
> I st Year April ‘98 65.1
> III rd Semester November ‘98 65.5
> IV th Semester April ‘99 73.875
> V th Semester November ‘99 69.875
> VI th Semester April ‘2000 74.750
> VII th Semester November‘2000 82.75
> VIII th Semester April ‘2001 80.285
>
>
> PROJECT WORK
> a).B.E. LEVEL :
> TITLE : COMMUNICATION SYSTEMS IN AVIONICS
>
> This Project was done at Indian Airlines,
> Hyderabad Office that formed a part of our
> Internal Project. The project spread around
> for one month.The Project helped to get used
> to peer work pressures and work in a group.
>
> c).DVLSI COURSE :
> TITLE : 1.8355 (MULTIFUNCTION DEVICE).
> 2. 4 PORT ETHERNET SWITCH .
>
>
>Skills : Fortran,Windows , C, VHDL / Verilog,
> FPGA Design Tools (Xilinx Design
> Manager,Leonardo Spectrum) and CMOS
> Design Tools (Magic, Irsim)
>
>
>Interests : Browsing Technology Books, Browsing on the Internet,
> Interest in Art and Culture, and watching Cricket.
>
>


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