[ List Subjects ][ Current Board ][ Post Message ]
Subject: Mentor Graphics: India requires Project Leader - Design for Testing
[ View Followups ][ Post Followup ]
Date: 09/05/01 at 7:41 AM
Posted by: Gopinath L
BS/ MS in Electronics, Computer Science with 5 plus years exp.
Skills: Verilog, VHDL, ASIC Flow, Synthesis ( PC / Mentor/ Cadence), programming Basic ( C, C++), scripting language ( Perl, Unix, Shell/ C/ Kernel), DFT basics & Knowledge.
Experience in layout verification tools, in the area of standard and gate array cell design, knowledge of logic design, layout and timing analysis. Knowledge of HSPICE simulation. ASIC design and hardware modelling.
Experience in releases, builds, validation of tools methodologies. Should be able to handle teams, management including technical and general.
Interested candidates can contact:
iCat ( Recruiters for Mentor Graphics India)
Voice: +91-40-7803090 / 7719508
Post a Follow-up: