In Reply to: Requirement of VLSI CAD Engineer fo a postion in Japan posted by Meeta on 06/18/01 at 12:51 AM:
Let me introduce myself, Iam Atul Wahi currently working
as a Contract Engineer at RW RESEARCH & DESIGN CENTRE (ON VLSI PROJECTS)
HAL, Bangalore for a YEAR now. Alongwith my job
Iam undergoing a Post graduate diploma in ADVANCED VLSI
DESIGN.Which is certified by the Ministry of Information
& Technology,& is being conducted at Benns Technologies
I completed my Engg. from B.U in 2001 with Distinction -
sending my resume for your kind perusal.
In the light of the same my academic qualification and
work-exp meet the needs of your organization I would be
more than willing to meet you for a discussion
Looking fwd. to hearing from you soon.
Thanks and Rgds.
CV PASTED BELOW
E-20/5 , DRDO Township
Bangalore 560 076
Res.No.5245609 / 3736
Email : firstname.lastname@example.org
Conscientious, hardworking and result oriented first class Electronics Engineer
with aptitude and skills for software , hardware development and an efficient technocrat.
Have over ONE YEAR of practical experience & currently working as a 'Contract Engineer' at
RW RESEARCH & DESIGN Centre (HAL) , Bangalore.
Concurrently undergoing training on Advanced Diploma in VLSI Design at Benns Technologies,
Bangalore authorized by the Centre for Electronics Test Engineering (Government Of India).
Along with technical competence, I have good communication, time management and strong
nter-personal skills needed for a team member.
Operating Systems : Windows NT , Windows 2000 ,Unix, DOS
Languages : C ,C++, Fortran, VHDL, Verilog, Assembly Language for 8085/8086
Database : MS-Access
Package : MS-Office
Products : Spice , Xilinx , Synopsys , Cadence , Modelsim,
Leanardo Spectrum , Edwin , Altera , Active Hdl,
Electronic Work Bench , Matlab .
Hands on experience in VLSI, design & development of FPGA based systems and software design
and user experience.
* Bachelor of Engineering M.V.J.College of Engg I Class ~ 65% , 2001
Electronics & Communication Bangalore University Distinction in final sem
* Pre University K.L.E College I class ~ 62% , 1997
PCME Karnataka Board, Bangalore
* S.S.L.C New Public High School I class ~ 76% , 1995
Karnataka Board, Bangalore
Additional Courses Undergone
* C ,C++,UNIX programming.
* Currently undergoing training on Advanced Diploma In VLSI Design ,
authorized by the C.E.T.E (STQC Directorate Government of India).
1. From Sep'2001 - till date : Flight Test Centre (HAL), Bangalore
Designation : Contract Engineer
* Development of a FPGA based CELP & GPIO System Design.
* CELP : Code Excited Linear Prediction
* GPIO : General Purpouse I/O
* Coordinating the activities for other modules of the System.
Tools used : Altera , Synopsys, Matlab, C programming.
2. From Oct'1999 - Nov'1999 : Computer Centre, Helicopter Design Bureau
H.A.L , Bangalore
Designation : Trainee
* Networking of various stores to the Main Frame for demand and supply
cycle analysations' (LAN based)
Operating System Used : Unix
3. From Feb'1999 - Mar'1999 : M/s Wheels Computer
Designation : Apprentice Supervisor
* Mentoring and supervising company technicians on assembling computers, which also included
maintenance and servicing of related peripherals.
4. B.E Project
Title : "PCM Data Acquisition And Its Display
[8086 Microprocessor Based]".
Project mainly consisted of monitoring of various Flight test parameters adhering to the
flight safety norms stipulated by the D.G.A.C.A & D.G.A.Q.A (Ministry Of Defence), &
interfacing & displaying it on the Microcomputer (8086) which is used for data storage &
data processing at different address lines.
Date of Birth : 10 April 1980
Passport Number : A 6003070
Marital Status : Single
Father's Name : Shri R.C Wahi
& Occupation Principal scientific officer
M/o Defence , Bangalore
* PCB making.
* Reading journals related to concepts of SS7, Networking, Bluetooth & WAP enabled
* Participated in the State Level Science Expo organised by the Government Of India(Karnataka Wing).
MVJ College Of Engineering
(ISO9002 CERTIFIED INSTITUTE)
Mr Z.H Zaidi
DGM (RWR&DC) HAL