In Reply to: Asic Designers/VHDL/Verilog/Firmaware Designers for US and UK posted by Ms. sujatha on 11/03/00 at 12:10 PM:
Course: - Certificate course in VLSI Design
University: - University of Pune
Major: - DSP, Advanced Digital Design, CPLD, FPGA & ASIC Fundamentals, JTAG, High Level Design, Layout Design, Testing and Verification.
Project: - Speech Recognition (End Point Location).
Period: - January 2001 - June 2001
Course: - Bachelor Of Engineering (Instrumentation)
Institute: - P. R. C. E. Loni.
Major: - Digital Signal Processing, Process Instrumentation, and designing, Process Modeling and Optimization, Project Planning Estimation and Assessment.
Project: - Fuzzy Precompensated PID DC Motor Control.
Period: - August 1995 - June 2000.
Technical Summary: -
Training: - In ANALOGICS I was trained for the PLC. These are from Allen Bradley of Micro Logic Series. We were worked on SLC 500/2 and SLC 500/3.
Hardware Skill Set:
Synthesis tools: - FPGA Express.
Simulator: - Xilinx 3.1i.
HDL: - VHDL and Verilog.
Assembly Languages: -8085.
Software Skill Sets: _
Operating System: - DOS, Windows 98.
Software Language: - C, C++.
Tools Used: - AB PLC on Rockwell S/W.
Projects Undertaken: -
Speech Recognition: -
AT Dept of Electronic Science, Pune University
Description In this project we are going to establish a VHDL code for the respective system. Most probably we are trying to implement the speaker independent system.
Team size 2
Duration 3 Months
Status Start point detection, end point location was completed.
Fuzzy Precompensated PID DC Motor Control.
Duration 01 year
Description The main aim of my project is just to prove that the FUZZY PRECOMPENSATION technique gives the better response and performance than the PID Loop in any process. For this project we had implemented these respective loop for the DC Motor.
Status Completed Successfully.
Cooler Fan and Humidity Control Gadget
Description For this project we had designed a simple monostable circuit
With varying duty cycles. This single circuit performs both the function.
Status Completed successfully.
16 Bit MAC
Description This unit is designed for the purpose of Multiplication and Accumulation. This block is required for the calculation of Convolution, Correlation, etc. The coding is done in VHDL.
Status Completed successfully with max operating frequency of 137 MHz
8 Bit Convolution
Description This was designed for implementation of the H/W for performing convolution on any obtained data.
Neurofuzzy Control System
Description In this, I had explained how we can achive better performance for any of the control application or any process, if we combine both Fuzzy Logic and the Neural Network.
Fuzzy Precompensated PID DC Motor Control
Description The main aim of this is to prove that how Fuzzy can work more efficiently than the PID algorithm.
This topic was presented at IEA, Bangalore for the cause of Paper presentation competition. In the same I stood FIRST in INDIA.
Work Experience: -
From 23rd of June2000 till 18th of Jan 2001, I had worked for the firm “Spectrum Industries” as a Process Engineer and Design Engineer. This industry is SSI and Manufacturer of PVC machines and also PVC Pipes. I was there on the Temperature Control Loop. I was also responsible for the daily production.
Address 30, 31 Dharshi Jivan Chal;
At post Barshi: - 413401;
Dist.: - Solapur (Maharashtra)
Ph. No.: - (91)-(2184)-(22375)
Date of Birth 10th November 1977
Marital Status Single
Languages Known English, Hindi, Marathi, Gujarati.
Above information is best of my knowledge.
PLACE: - SIGNATURE