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Subject: Re: ASIC Design Engineers - San Diego

Date: 06/25/01 at 6:10 AM
Posted by: cs vijayakumara
E-mail: v_kumars@usa.net
Message Posted:

In Reply to: ASIC Design Engineers - San Diego posted by Don Thomas on 03/16/01 at 8:56 AM:


RESUME


VIJAYA KUMARA C S
C/O, B P KEERTHIMALINI,
# 100/13, 1ST MAIN ROAD,
SESHADRIPURAM,
BANGALORE-560020,
PHONE : 3342419(pp).
E-mail : csvijay@usa.net
v_kumars@usa.net


CARRIER GOAL : To pursue a challenging hardware career.


AREA OF INTEREST : I am interested in designing CMOS DIGITAL
Transistor Level Digital system.


EXPERIENCE : July 2000 till Date.


Offshore Experience: One week of Technical Discussion in Germany,
presently Working on the offshore project.


PRESENTLY WORKING: As the member technical - ASIC.

TECHNOLOGY KNOWN :0.5 CMOS TECHNOLOGY(DESIGNING AND BACKEND).
0.18 CMOS TECHNOLOGY(KNOWN BUT NOT WORKED).

EDUCATIONAL QUALIFICATION:

QUALIFICATION UNIVERSITY/COLLEGE CLASS YEAR OF PASSING

P.U.C. D R M SC COLLEGE. FIRST CLASS (65%) 1995

B.E.(E&C) B.I.E.T.,DAVANAGERE FIRST CLASS (68%) 1999
(KUVEMPU UNIVERSITY)

TRAINING COURSE : Completed course on VHDL conducted by SILICON
MICRO SYSTEMS, Bangalore.

Course includes coding, simulation and synthesis of digital com-
ponents like flipflops, counters, decoders, multiplexer, encoders,
adders, demultiplexers,shift registers, etc and implemented.


COMPUTER SOFTWARE KNOWLEDGE :

* HIGH LEVEL LANGUAGES : C- programming, LEX and YACC, PERL.
* ASSEMBLY LEVEL LANGUAGES : Intel 8085, 8086.
* PLATFORMS WORKED : DOS, WINDOWS 95 /98 and UNIX.


HARDWARE TOOLS KNOWN:

FRONT END

HDLíS : VERILOG, VHDL.
SIMULATORíS : NCVERILOG, VERILOGGER PRO, VHDL SIMILI.

BACKEND

CADENCE : ICFB, SCHEMATIC COMPOSER.
TRANSISTOR LEVEL SIMULATOR : SPECTRE.
LAYOUT : VIRTUOSO,VIRTUOSO-XL(DRC, EXTRACTION & LVS).
SYNTHESIS : SYNOPSIS EMAX PLUS II .
FLOORPLANING : SILICON ENSEMBLE, AVANTI (NOT DESIGNED).


PROJECT PROFILE:

PROJECT #1:

Title : 3-wire bus interface .
Designed at : ISO 9001 company.
Technology : 0.5 u cmos.
Tools used : Cadence composer,
Spectre for simulation.

Verification : Architecture verified using the verilog structural
level coding.

Abstract:

This project as it name suggests that whole the bus operation is
supportedby the three signals from the bus master for the bus
operation. The data coming in serially is latched; after the 8 bits
of the data is received the data is transferred to the destination
register according to the address sent by the master.This bus
controller is capable of handling the eight destination registers.
Like pll1, pll2, transmitter gain, receiver preload,receiver gain
load, etc.


This is mainly used in the RF blocks in the PLL (phase locked loop).


Project #2:
TITLE : The Hspice to Verilog switch level converter.
Designed at : ISO 9001 COMPANY.
Software used : lex , yacc and c- language.
Operating system : Solaris.

ABSTRACT :

This converter converts the hspice net list to the verilog switch
level.The LEX file declares the tokens to be parsed from the input
file.The YACC file declares and checks the grammar for the extracted
tokens if grammar matches the token will be parsed. The parsed
parameters are stored in the array.Then using the c program the
output is printed in the verilog switch level format .


PROJECT #3 :

TITLE : AMBA - ADVANCED HIGH PERFORMANCE BUS (AHB).

ABSTRACT :

This project includes the designing of the control unit which
establishes the communication between the processors and the peri-
pherals.This control unit can handle sixteen masters and sixteen
slaves by allowing single master at a time, depending on the
priority assigned. It also takes care of the transferring the data.

This control unit is designed and coded using the VERILOG language.

B.E. PROJECT :

TITLE : PC BASED MICROCONTROLLER PROGRAMMER.

SPONSORED: KSCST, BANGALORE.
HARDWARE : Programmer target board.
SOFTWARE : written in c++ provided by microchip company Inc USA.
SUMMARY : project includes developing the hardware and software.

Hardware is the programmer target board to be interfaced to
computer through comport the board contains ALP 961150469 which
contains firmware code and provide the all communication between
the pc and micro-controller to be programmed.


The software includes three parts.

MPLAB: is windows based integrated development environment for
microchip Micro-controller family. MPLAB allows writing,
debugging the source code to be filled into microcontroller.


MPASMWIN: is windows based platform for developing assembly
language code.It translates source code to machine code.

PICPROG: is software written in c++ enables us to program the
user software into micro-controller devices.

By using this programmer we can program micro controller like
16C84 and 16f84 of Microchip Company.


PERSONAL DETAILS:

DATE OF BIRTH : 11th June 76.
NATIONALITY : Indian.
LANGUAGES KNOWN : Kannada, English, Hindi and Urdu.
SKILLS : Learning the new things and hardworking.
PASSPORT NUMBER : A8786260


Awaiting a positive response from your esteemed organization.


PLACE: BANGALORE.
DATE :
C.S.VIJAYA KUMARA


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