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Subject: Principal Design Services Engineer-UK

Date: 04/08/01 at 8:27 PM
Posted by: Ms.Sujatha
E-mail: brainet@hd1.vsnl.net.in
Message Posted:

Principal Design Services Engineer

Role and responsibilities

A hands-on role in taking the lead in defining the CAD tools and
methodologies for RF and mixed signal design. In addition, the group will
provide layout and foundry interface services.

Responsible for 1-2 engineers supplying tools and backend support to the RF,
mixed signal, hardware and software teams.


Requires 7 years plus in CAD tools support, backend layout design,
preferably gained in the development of IC's.

The experience should encompass all aspects of a typical mixed signal/RF
design flow using current state of the art tool-sets. It is important that
the candidate is aware of the best point tools on the market for specific
applications rather than simply the tools offering from a single vendor.

Core Skills

1. Design Methodology

1. Top-down design flow
1. Has a good understanding Top-down Mixed signal design
techniques and the pros and cons of the various design
2. Design Data management and control
1. Version control
2. Project management
3. Archiving and retrieval

2. Tool support

1. The candidate will be responsible for liaising with the tool vendors
and negotiating licensing agreements.
2. Forecasting of software tool usage to maximize return on investment.

3. Workstations/PC's

1. Work closely with the systems administrator to define the processing
requirements and negotiating the purchase of appropriate workstations,
PC's, disk storage etc.

4. Backend Layout and foundry services

1. Main point of contact and interface to various
foundries(TSMC,UMC,Charted Semicondictor,AMI…).
2. Obtain, install, manage the design data from the foundries and install
appropriate procedures and controls to mange this data.
3. Layout of analogue and RF cells.
1. Should have a good understanding of standard layout techniques for
analogue an RF design design. Examples are common centroid,
symmetrical structures.
2. Layout of precision on-chip transistors, resistors, capacitors and
4. Chip level layout
1. Chip level floorplanning and routing.
2. Layout techniques for minimizing cross-talk.

5. Team Leadership

1. The candidate should to be able to mentor, motivate, plan and
schedule the work related to the Design services group.

6. Design tools

1. VHDL/Verilog Coding.
2. Hspice/Spectre/Saber
4. Virtuoso
5. Dracula
6. Synopsys design compiler
7. Synopsys Test compiler

Desirable skills

1. Experience gained as part of an IC development.
2. Knowledge of current design tools and methodologies applicable to
System on chip.


B.Eng., B.Sc. or higher in Electronics, Mathematics or Computing related

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