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Subject: RF IC Design Manager-UK

Date: 04/08/01 at 8:25 PM
Posted by: Ms.Sujatha
E-mail: brainet@hd1.vsnl.net.in
Message Posted:

RF IC Design Manager

Role and responsibilities

A hands-on role in RF IC design, managing a small team of up to 5-6
engineers.

The primary focus for the group will be RF IC subsystems design,
initially for mobile communications.

The group will interface very closely to the Hardware, Software and
Systems teams to provide leading edge IP solutions for the next
generation of mobile communications chip-sets.

The main technological focus will be developing leading edge circuits
in deep sub micron CMOS(<0.14um) at frequencies typically to 3Ghz and
upto 5Ghz.

Experience:

Requires 7 years plus in a RF CMOS/BiCMOS/Bipolar IC design
environment, preferably gained in the development of mobile/data
communications IC's, preferably GSM.

The experience should encompass all aspects of a typical RF IC
development life cycle from initial specifications through to device
characterisation and final production.

Core Skills

1. CMOS analogue/RF IC design.
1. Design of basic analogue circuit blocks.
1. Amplifier design

Design of Low noise amplifiers and variable gain stages
in an IF strip.

2. Mixer Design

Design of Gilbert cell mixers, switching FET mixer.

3. Quaderature up/down converters.
4. Power Amplifers

Design techniques for PA design and linearisaton.

5. Opamps - single ended miller, folded cascode

A through understanding of basic single ended miller
compensated opamp design.

6. Differential Opamps

Design of fully differential opamps.

7. Comparators

High speed comparator design techniques.

8. PLL and oscillators - high speed PLL design techniques.

Design of on-chip VCO's and PLL frequency synthesisers
upto 2.5 Ghz.

Fractional-N synthesisers.

9. Voltage and current references.

Basic voltage reference design including bandgap references.

2. RF systems design
1. A good understanding of GSM/Bluetooth/DECT RF front end
systems requirement.
3. Design of on-chip continuous time filters
1. A general appreciation of design techniques and tools
for designing and implementing on-chip filters.
4. Layout
1. Layout and verification of analogue cells.
1. Experience of DRC and LVS.
5. Testing
1. Analogue/RF
1. Design for test of analogue circuits.
2. Experience of breadboarding and debug of final
silicon.
3. Experience of specifying analogue/RF test for ATE
testers.
1. General Team Leadership/Management

Requires good leadership and motivational qualities gained in an
existing team leader/management role.

Desirable skills

1. Chip level integration and verification using analog AHDL
behavioral.
2. Knowledge of current design tools and methodologies applicable to
RF IC design.
3. Interfacing to independent foundries.(TSMC, UMC )
4. Experience of the Cadence Analog Artist design environment.
1. SpectreRF - analog circuit simulation
2. Virtuoso - cell level editor
3. Dracula DRC and LVS.

Qualifications

B.Eng., B.Sc. or higher in Electronics, Mathematics or Computing
related fields.


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