In Reply to: power disiipation posted by saritha varma on 11/07/00 at 6:09 AM:
Let's say that a CMOS gate has a capacitance called "Cin" and that the voltages applied to the gate are taken from zero to +V and then back to zero again at some steady frequency.
The stored energy of Cin will go from zero at zero gate voltage to ½ Cin V² at a gate voltage of V. The transitional energy value ½ Cin V² will be incurred on both the rising and falling edges of the gate input waveform. Therefore, the total energy transfer by the driving MOSFETs to the capacitance, per input cycle, once going up and once going down, will be Cin V².
Power is energy per unit time. At a driving waveform frequency "f", the period of time for one drive cycle is 1/f seconds. Therefore, the power transfers handled by the driving MOSFETs will be energy divided by time which is Cin V² / ( 1/f ) = Cin V² f measured in watts. The capacitance won't dissipate energy, but the pull-up and pull-down MOSFETs will.
Static dissipation values are very small for CMOS, but power consumptions rise as operations are speeded up. Maybe this description will help.
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