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The OpenCores organization announces the immediate availability of the open-source, free,
complete 33/66MHz 32-bit PCI Bridge Soft Core solution.
PCI Bridge Complete & Tested
The PCI Bridge Soft Core is a complete, synthesizable RTL (Verilog) code that provides
bridging between the PCI and a WISHBONE (System-on-Chip) bus. The complete
package includes comprehensive specification and design documentation, a comprehensive
verification suite, and a test application.
Test application is a “VGA card?implemented using a Xilinx Spartan II device on a PCI
development board from Insight Electronics. PCI bridge core is connected to a simple
VGA controller core forming a system-on-chip and comes with a Linux frame buffer
The PCI Bridge Soft Core supports common ASIC and FPGA libraries and is highly
configurable including options for Master/Target or Target-only as well as for Host or
Guest operation. You can download the PCI Bridge Soft Core from the OpenCores PCI
Project Website at .
OpenCores invites companies and universities to use our PCI Bridge Soft Core in your
projects. Our main motivation and the sole reason for launching the PCI project has been
and is to see the core used in many different projects. What we have in mind is a
development much like that of open-source software (e.g. Linux).
OpenCores is an organization whose main objective is to design, reuse, and integrate IP
cores under the General Public License (GPL) helping the concept of freely available, open-
source hardware to emerge and become visible and apparent. For more information about
our projects and us, please visit us at .
We are also looking for organizations interested to support/sponsor OpenCores projects.
OpenCores PCI Team