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Date: 10/30/00 at 1:05 AM
Posted by: Ben
E-mail: ReLax31@aol.com

Hi, does anyone have any general information about designing pulse forming networks? I know very little about them other than they consist of capacitors in parallel hooked up with inductors in series, and a couple little LC equations. I'm trying to create a relatively flat, high current pulse for 1 to 3ms, using 15 250VDC 6,200uF capacitors (bank capacitance: 93,000 uF, ~3kJ). Anyone know how I would go about designing the inductors based on my time and flatness requirements? Thanks!
-Ben

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