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Subject: PCI Target abort with Galileo 64130 bridge

Date: 09/21/00 at 10:04 AM
Posted by: Scott Hurt
E-mail: scott.hurt@honeywell.com
Message Posted:

I have a PowerPC 750 processor design that uses a Galileo 64130 PCI bridge chip in dual 32-bit PCI mode. The PowerPC processor is up and running VxWorks and has initialized the Galileo, is accessing Flash and SDRAM memory, etc flawlessly. The system is able to correctly perform PCI configuration cycles to all devices on each of the two PCI busses.

I have an AMD AM79C972 Ethernet controller on one PCI bus. The processor performs all of the necessary PCI I/O cycles to initialize the controller up to the point where it enables the controller to finish it's configuration by turning into a PCI master and fetching additional information from SDRAM.

If we send the Ethernet a known-bad address, when the Ethernet controller performs a PCI cycle to read SDRAM, the transaction ends with a master abort just as it should. However, when we send the Ethernet part a known-good address, it begins the PCI transaction as master, but then the Galileo responds by forcing a retry (i.e. asserts STOP# without asserting TRDY#) this happens no matter what the address is, if it is in the valid address range.

The Ethernet controller will continue to perform retries until power is cycled.

Has anyone else who has worked with the Galileo experienced this phenomena? Any suggestions on what to look at?



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